Qs for AES PrePrint 2106 (Cohen Transformerless Mic Pre)

Hi

Just received my copy of the famous 2106 preprint and had to throw part of the original circuit (Cohen.gif, Q1-Q4 = 2x LM194, U1/U2 = 1x NE5532) into the simulator. Now allow me three questions:
* what is the function of D1/D2? He doesn't mention these components in the text (or I overlooked it).
* does it make sens to choose C1 much larger for better PSRR? As shown, it looks like an (pointless?) attempt to match C1 to C2/C3.
* he reports a slew-rate of 18 V/us; how's that possible with the NE5532?

Your answers are very much appreciated - as always!

Samuel

I think he's referring to the slew rate as determined by the current in Q1/Q2 and Q3/Q4 through R3/R4 as they drive into the 100pf cap C2/C3. My math suggests 18v/us.

He clearly states this as an overall amplifier performance.

I believe that the input pair current does not set a (reasonable) slew limit - this here works different from standard opamp topologies. But I might be wrong as I didn't thought things through that well...

Collector current is about 3.3 mA each, doesn't that make much more than 18 V/us anyway? 50 V/us?

Hm, we are balanced... 2 x 9 V/us = 18 V/us?

Samuel

C1 doesn't help PSR where it is located. If rejection of power supply fluctuation is the goal then note that the biggest effect of motion of the positive rail is to change the currents in R3 and R4. To the extent that things are well-matched on each polarity of the signal path this will produce an equal change in both outputs and will presumably be rejected by a following balanced input.

Where a cap would help for PSR would be across R5, constraining the voltage at op amp n.i. inputs to move with the voltage feeding R3 and R4.

So, the purpose of C1 is a bit obscure. It may have something to do with the capacitances of the big devices at the input, and be tuned to provide better high-frequency common-mode rejection. Try it in sim and see what it does. You will need a better model for the LM194's than a couple of MPSA18's for the sim to have any validity I suspect.

D1 and D2 I'm guessing are for a combination of things: to prevent the input common-mode range of the op amps being exceeded when the input of the preamp is violently overdriven, and possibly to temperature-compensate the output voltages (as the input devices heat up, if the collector currents were constant the output voltages would rise a little; since the voltage at the bottom of the diodes also rises, but not as fast at op amp pins 3, there is some compensation). The first reason is the main one and maybe the only one intended.

The circuit appears to be a pair of cascode input stages (current sources) coupled to a cross coupled pair of current to voltage converters realized by the two op amps. The slew rate of this type of circuit will exceed the specifications of the op amps used since the slewing rate is generally characterized in a normal feedback configuration while simultaneously keeping the operation of the overall amplifier in a class A mode since current flows in both sets of input transistors. The two diodes and the associated resistors are apparently used as a voltage reference for the current sources. The positive rail rejection of this circuit should be quite good since noise voltage appearing on the positive rail would have to create a significant differential current at the negative inputs of the op amps in order to appear in the signal output. This configuration is used in automotive applications for this reason to reject noise on the single supply rail. The size of the capacitor C1 should probably be much larger than specified. All AC on the positive inputs needs to be bypassed.

[quote author="burdij"]The circuit appears to be a pair of cascode input stages (current sources) coupled to a cross coupled pair of current to voltage converters realized by the two op amps. The slew rate of this type of circuit will exceed the specifications of the op amps used since the slewing rate is generally characterized in a normal feedback configuration while simultaneously keeping the operation of the overall amplifier in a class A mode since current flows in both sets of input transistors. The two diodes and the associated resistors are apparently used as a voltage reference for the current sources. The positive rail rejection of this circuit should be quite good since noise voltage appearing on the positive rail would have to create a significant differential current at the negative inputs of the op amps in order to appear in the signal output. This configuration is used in automotive applications for this reason to reject noise on the single supply rail. The size of the capacitor C1 should probably be much larger than specified. All AC on the positive inputs needs to be bypassed.[/quote]

C1 where it is only makes power supply rejection worse, because the input signals to the inverting op amp inputs are not referenced primarily to common. This is because the collector impedances of the 194's are high compared to 1k. The amount of gain in the input devices renders the noise contribution of the R5-R9 voltage divider negligible so concern about eliminating a.c. there is mostly unwarranted---however, from the standpoint of power supply noise one wants the a.c. at the n.i. inputs to track that at the top of R3 and R4, hence my previous suggestion of a capacitor across R5. Unbypassed, the loss due to the effect of R9 means that tracking is not that good. However, I'm convinced that C1 controls high-frequency common-mode rejection and that this was considered more important than PSR. One could have one's cake and eat it too if R9 were replaced by a current sink.

It's not clear to me, in the absence of knowledge of what charging currents are involved internal to the 5534's where the slew rate limitation is.

What? Cascode input? 3.3ma collector current? Man, now I'm really confused...

I thought this was a parallelled differential transistor input, and current on the collector(s) was defined by the current through resistors R3 and R4 (18ma). Take that amount divided by C2 and C3 (100pf) and then divide that by 1,000,000=18v/us.

Anyway, I'm exhausted and I'm probably wrong. It wouldn't be the first time...

[quote author="featherpillow"]What? Cascode input? 3.3ma collector current? Man, now I'm really confused...

I thought this was a parallelled differential transistor input, and current on the collector(s) was defined by the current through resistors R3 and R4 (18ma). Take that amount divided by C2 and C3 (100pf) and then divide that by 1,000,000=18v/us.

Anyway, I'm exhausted and I'm probably wrong. It wouldn't be the first time...[/quote]

It's not a cascode input. But the current through R3 or R4 is set by the potential between the end of the LED's and the voltage-divider-set potential at the n.i. inputs of the op amps---I reckon about 6.7V across R3 and R4, hence 6.7mA total for each input pair. The collectors sit at about 8.1V above common. The op amp outputs have to supply the emitter currents, hence will sit at about 300 ohms times 6.7mA below the emitters, or roughly -2.7V.

EDIT: I neglected, for a floating source to consider the base current sucking down the input d.c. level. For moderate beta devices the outputs could be around -4V.

As far as slew rate is concerned, I don't have a model for the 5534---but I'm inclined to believe that it, rather than the steering of emitter currents into and out of 100pF, will dominate the slew rate. Note as well that this preamp will be limited by op amp max output currents in swinging voltage---the series 300 ohm loads driven in bridge are brutal.

EDIT 2: Yes, after reviewing the 5534 datasheet it's confirmed that with that comp C of 22pF the slew rate will be limited to about 13V/us by the op amp single-ended, hence double that for the balanced output.

But the current through R3 or R4 is set by the potential between the end of the LED's and the voltage-divider-set potential at the n.i. inputs of the op amps

Click to expand...

Ah, now I get it. Those two LED's are giving us a voltage drop of roughly 3vdc or so each. That gives us a little more than 12volts to be divided by the two 1K resistors

[quote author="featherpillow"]

But the current through R3 or R4 is set by the potential between the end of the LED's and the voltage-divider-set potential at the n.i. inputs of the op amps

Click to expand...

Ah, now I get it. Those two LED's are giving us a voltage drop of roughly 3vdc or so each. That gives us a little more than 12volts to be divided by the two 1K resistors[/quote]

Probably about 1.6-1.7V each if they are standard GaAsP red ones. They are there to prevent the input voltages to the inverting op amp inputs from exceeding the input common mode voltage range when the preamp inputs are heavily overdriven.

The voltage across the resistors is 18 - 2(1.7) - Vin op amp. Vin op amp is set by the divider off of that 2-LED-V-below supply voltage going to the negative rail, which fixes the n.i. inputs of the op amps and thus determines what the inverting inputs' voltage is as well. That voltage according to Circuitmaker is about 7.7V---my quick estimate above I believe was 8.1V. Your mileage may vary.

Thanks for the contributions.

So the LEDs can go if we protect the input i.e. with diodes to the supply rail or zeners? See them all the time on transformerless designs, but never these LEDs.

On most designs, I see R9 going to ground instead to the negative supply; and advantage for this?

The following stage has 6 dB gain, so the 300 ohm feedback network is not that hard to drive as it might look, but I would add a buffer nonetheless.

Samuel

[quote author="Samuel Groner"]Thanks for the contributions.

So the LEDs can go if we protect the input i.e. with diodes to the supply rail or zeners? See them all the time on transformerless designs, but never these LEDs.

On most designs, I see R9 going to ground instead to the negative supply; and advantage for this?

The following stage has 6 dB gain, so the 300 ohm feedback network is not that hard to drive as it might look, but I would add a buffer nonetheless.

Samuel[/quote]

In order:

No. The issue is exceeding the operating common mode range of the op amps, not restricting the inputs of either the whole pre or the op amps to 0.7 volts above and below the rails. You don't have to do it his way but you should do it some way----or just don't ever overload.

From the discussion about PSR above, it follows that there is an advantage to R9 going to the negative rail---as mentioned it would work even better with a (stable ~noise-free) current sink. Now if the negative rail is grungy/noisy it's a different story, but then the supplies should be clean as a matter of course.

Yes, the double diff stage not shown on your schematic does alleviate the drive problem, although it is still a brutal load---can you say crossover distortion?

You don't have to do it his way but you should do it some way--or just don't ever overload.

Click to expand...

Ah, I see - however, I don't remember having seen any protection in similar designs (i.e. 9098micpre-1.jpg, gren_pre_cct4.gif, c84_sch.pdf, JFETMP1.PDF) - or am I wrong?

Samuel

[quote author="Samuel Groner"]

You don't have to do it his way but you should do it some way--or just don't ever overload.

Click to expand...

Ah, I see - however, I don't remember having seen any protection in similar designs (i.e. 9098micpre-1.jpg, gren_pre_cct4.gif, c84_sch.pdf, JFETMP1.PDF) - or am I wrong?

Samuel[/quote]

Well, I could be wrong too. I guess the question is, what is the behavior of the 5534/32 etc. in heavy positive input overload? Bear in mind that I'm not suggesting that it is destructive, if the current is limited, just that it may be associated with phase reversal or some other anomaly, and consequently worse-than-mere-clipping distortion. But maybe his purpose was just to stay within the listed electrical specification, which says +/- 12V for +/15V rails, i.e., 3 volts below and above the rails respectively.

Cohen is apparently silent in the famous paper about the rationale.

Someone should try it. I don't know if your model for the 553X captures the real overload behavior or not. A cursory glance at the schematic (looking at the Phil*ps 5532 datasheet for example) suggests that the parts are less likely to invert polarity on merely positive common-mode input overload, compared to the now common diff pair + current mirror input config like the LM833, BA4560 etc.---the latter which definitely get into trouble on negative common-mode input overload.

I don't know what the common-mode overload behavior is for the op amps used in the other designs.

Thanks for the clarification - I didn't thought it through and assumed a destructive overload.

Samuel

[quote author="Samuel Groner"]Thanks for the clarification - I didn't thought it through and assumed a destructive overload.

Samuel[/quote]

Someone in here must know how 553X's work when the common-mode range is exceeded.

Anyone??

I've got some somewhere but don't quite have the time to mess with them right now.

Hello Samuel and others. Its been quite a while since we had any posts on this thread, but I thought I should mention that an AES friend of mine Ian DuRieu has been busy and has talked Graeme Cohen into having all his preamp literature posted on Ian's Web site. It can be found here http://leonaudio.biz/cohen.htm Wayne over at the Pico compressor forum has also been notified and a few responses have started to come in.
Keith Taylor