Another Discrete Amp - GainBloak

[PRR]

> The result was a nasty 0.25% distortion

Which transistor has a LARGE variation of current? Fix it.

0.01% to 0.005%? Why? Lots of point-oh-one amps sound gritty after a while. If 2nd is below 5%, 3rd is much-much below that, and all else is in the noise, that's perfect for the ear. Don't get so crazy reducing few-tenths low-order THD that you increase high-order THD.

 

[bcarso]

What was the level you were measuring at, and what is the dependence of the distortion on level? I don't see where that quarter-percent is coming from if the circuit is working correctly, unless something is damn close to running out of juice.

That said, agree with PRR that distortion minimization in its own right is a questionable proposition. OTOH the current-mode topology should have excellent characteristics otherwise, especially as regards transient response.

Brad

 

[tk@halmi]

Which transistor has a LARGE variation of current? Fix it.

The source follower is the primary suspect. I think a source follower
after the input transistor is a better idea. If needed to improve stability local feedback can be applied easily to the input buffered VAS stage. I still want to fix the second version to see what failed.

...distortion minimization in its own right is a questionable proposition.
I cannot disagree with that. Although minimizing odd harmonic distortion was one of my original objectives.


0.01% to 0.005%? Why?
Indeed these numbers are arbitrary, and I should abandon them. Rather I will stick with the initial distortion goal mentioned above.


I hope to learn from the various methods employed impact on gain and distortion content. Hopefully, this weekend I am going to be listening to each version as well.

Tamas

 

[tk@halmi]

Hello,

After running tests on all three versions I am beginning to like the original one. Adding a source follower before or after the VAS seems to reduce even harmonic distortion only. Measurements were taken fixed at 0dB output and input of -30dB to -7dB, and than fixed at +10dB output. It is always going into a 470 ohm load. There is a 3rd harmonic component around 0.002 to 0.004 that I could not further reduce with any means I know. The original circuit "masks" that with 2nd harmonic distortion of 0.02 to 0.04 percent.

There are a few very minor changes to the schematics that I will post in a few days. The circuit LOVES high voltage rails. Originally I thought it would be OK to run at 18 or 20V rails, but that turned out to be wrong. This amp starts to shine at +-24 volts that is unfortunately the maximum my power supply will put out.

Cheers,
Tamas

 

[Bauman]

cool ! :thumb:

 

[tk@halmi]

OK, I need some help from someone more knowledgable than me.
I have returned to using the original circuit. I am not shure if it is a bug or a design problem now. At low output signals the amp works great. When the output exceeds about +1dB distortion shoots up like crazy. It looks as if the input transistor goes beserk when the output exceeds approximately a junction voltage.

Thanks,
Tamas

PS.: I need a portable distortion analyzer. PC setup is really cumbersome.

 

[pstamler]

[quote author="tk@halmi"]OK, I need some help from someone more knowledgable than me.
I have returned to using the original circuit. I am not shure if it is a bug or a design problem now. At low output signals the amp works great. When the output exceeds about +1dB distortion shoots up like crazy. It looks as if the input transistor goes beserk when the output exceeds approximately a junction voltage.[/quote]

Could you post the schematic again, with DC measurements shown for all transistors?

Peace,
Paul

 

[bcarso]

Regarding Paul's request: Amen. Let's see what's going on here.

Brad

 

[tk@halmi]

Please see the circuit posted at the head of the thread, very first post.
I will measure voltages at nodes tomorrow.

Thank You,
Tamas

 

[bcarso]

Tamas, are you still using it at that particular closed-loop gain as shown on the first schematic?

Brad

 

[tk@halmi]

Brad,

I have a 10k rev log pot in place of the 100 ohm resistor.
Testing was done between 6dB and 34dB gains.
Also, I have tried a lower impedance feedback network 2k/1k pot.

Using an input pad I was able to get good parameters at 32dB gain
as long as the output stayed under 1dB.

Thanks,
Tamas

 

[PRR]

> Please see the circuit posted at the head of the thread

Reposting smaller for inline reference:

 

[tk@halmi]

The emitter of Q10 is "clenched" up at around .8 volt below that positive supply rail. I guess it cannot swing much then.

Any ideas?

Thanks,
Tamas

 

[bcarso]

Hi Tamas. The closed-loop voltage change at that point should be small---because the Q10-Q18 collectors' node is fairly high impedance (I calculate about 28k ohms based on some assumptions about the beta of Q19 and the load Z). That node should be where about all your internal voltage swing is. So not having the emitter of Q10 move very much is actually a sign the circuit is working.

One thing I forgot to ask you: do you have ample capacitive bypassing of the supply rails locally? This is a high-bandwith topology and will figure out how to oscillate if there is significant inductance in the wiring and no local bypassing of the power supply. I would use 100nF films and 100uF 'lytics in parallel from +/- V to ground. Also, keep the wiring as short as possible. Building the circuit on a board with a ground plane wouldn't hurt either.

Brad

 

[PRR]

> The emitter of Q10 is "clenched" up at around .8 volt below that positive supply rail. I guess it cannot swing much then.

It shouldn't. Remember I asked which stage has LARGE current swings? A steady voltage implies a small current swing, low 2nd harmonic distortion.

But 0.8V is the wrong answer. R111 is twice R123 and passes nearly the same current, should have twice the voltage. R123 looks like it should have 0.6V from D59 voltage. So R111 shoudl be 1.2V. Why is it less?

Base current of Q20 is "about" 0.5mA, but the current in R121 toward the bias diodes is only 0.8mA. And Q18 sucks base current too. So counting on thumbs, D58 D59 pass less than 0.3mA. And this assumes Beta=100. Beta is VERY variable. If Q20's Beta is a little low, D58 D59 are starved.

In general you would like to have bias-set current at least 10 times the base current. If you can assume Beta is mostly over 100, then bias current can be 1/10th of collector current. Since Q20 is probably supposed to pass 50mA, R121 should pass about 5mA, not 0.8mA. For a quick-fix, make R121 10K (3.9mA).

Here are my guesses of what it should be doing with ample D58 D59 bias:

Note that R10 is doing nothing in simulation. V21 is an ideal zero-impedance voltage source. You often need R10 in real life, but with an ideal V21 then R10 is just a waste of simulation effort. So Q9's base voltage IS 0.000VDC.

But assuming R113 is low-ish, I don't see why it isn't swinging properly. Everything except the diodes seems to have enough bias and swing. Is it failing in simulation or on breadboard?

 

[bcarso]

So I got curious enough about this to put one of them together just now. I did a fairly compact layout on Twin Industires pad-per-hole groundplane protoboard material. Power supply lines were bypassed with 100uF 'lytics and 100nF films. The +/- 20V was provided by a Tek bench supply.

I used some slightly different transistor types but I believe they are close enough for the results to be similar. In particular the output devices are some ancient MPSU05 parts, and the other Q's are 2SC1815GR (NPN's) and 2SA1015GR (the PNP). I had a little fan blowing on the board so I wouldn't have to mess with heatsinking the U05's.

The only deviation from the original schematic was to operate at a closed loop gain of about 11 (100 ohm/910 ohm R113 R114), and to put more current through the bias diodes as PRR and I suggested (I used 10k as recommended by PRR). Also I loaded the output with 464 ohms to be similar to what Tamas actually is using (470).

The thing came right up and worked fine, showing a nice frisky bandwidth with minimal ringing and overshoot on square waves. Sine waves looked great until well into clipping when things deteriorated as predicted from simulation.

When I went to measure distortion, the capacitive loading of the cable was enough to get things to scream. I isolated the cable C with 180 ohms of series R and everything cleaned up. So, the thing is sensitive to C loading as is. This is not surprising considering the bandwidth.

The distortion measured with an old HP 334A was essentially at my generator residual at 2kHz and 20kHz until close to clipping. For example it was about .025% at 10.6V rms out at 20kHz. It's likely better than this and if I can hop on someone's AP I'll get more comprehensive data.

Brad

 

[bcarso]

correction: closed loop gain of ten (aout 10.2 due to the effect of the 10k emiiter bias R for the input Q)

 

[tk@halmi]

Brad,

You are a scholar and a gentleman. Thank You for building the circuit.

For each distortion test I had a 25 foot cable on the output and I guess
that was enough to make it upset at higher output levels. It did not occur to me as a possible source of problem, but now I will make sure to minimize the length of signal path. As you said the bandwidth is very high.

Out of curiosity, I built the complementary output version that eats far less current and works very similar to the original. It requires just two additional diodes for biasing the output pair.

I have a couple of questions:
1. What would be the effects of using an NPN/PNP pair at the input instead of the single NPN transistor? I spotted this configuration on chip opamp schematics.

2. For the input transistor, considering noise, would it be better to use a high current device such as the 2N4403, or staying with a high gain transistor is sufficient?

Thank You,
Tamas

 

[bcarso]

Tamas, just isolate the cable loading with a small series R and you should be ok., as long as there are no other big parasitic inductances etc. within the layout and you have good supply line bypassing. My cabling wasn't very long (RG-58 stuff I think) but it took off without any need for signal immediately until I added the series R. The 464 ohm load, on the other hand, located right on the board was no problem. I should go back and see what the max C load is as well as the minimum series R needed to isolate C loading.

As far as further mods, there are many ways to go, and as I said earlier after a while you have built yourself a big discrete fully-complementary current-feedback amp. Not that that would be a bad thing perhaps.

But for simpler mods, yes you could preface the NPN input device with a PNP and cancel some of the offset voltage. The match is not perfect although it can be tuned a bit with collector currents. The temp. tracking will be less than great too. However, with this arrangement you could run d.c. coupled at lower closed-loop gains depending on the sensitivity of the application to such d.c. errors.

There are other arrangements of N's and P's but as I say the silicon starts to proliferate.

As to the choice of the input device, it depends on the source impedance. The MPSA18, if they are making them the same way as when Motchenbacher measured them back in ~'72, has exemplary high beta but not so low rbb', so its lowest noise performance occurs for source Z's around 5k at 1kHz and 2mA (and it's not that great there---about 3dB noise figure, that is, it contributes the same noise power as the source Z). At lower currents and higher source Z's it does a lot better. But running at lower currents wouldn't be compatible with the rest of the circuit.

When you add the complementary e-follower at the input you get some more voltage noise from the new device as well---but the current noise contribution of the following stage becomes small.

So, the question is one of the application(s).

Brad

 

[peterc]

Hi Tamas

I tried this on the simulator last nite, & fiddled around a bit.

I found the top half of the wave was being clipped & got rid of the clipping by upping the 200R resistor R111 to 300R.

I am not very good at the theoretical stuff, so I dont know if it will affect the cct in any other way...

Peter